پیش‌تقویت‌کننده کاملاً متعادل با هدایت انتقالی بهبود یافته بر پایه بافر ولتاژ تاخورده

[1]  A. Fahim, "Challenges in low-power analog circuit design for sub-28nm CMOS technologies," in 2014 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), 11-13 Aug. 2014 2014, pp. 123-126, doi: 10.1145/2627369.2631639.

[2]  W. Sansen, "Analog design challenges in nanometer CMOS technologies," in 2007 IEEE Asian Solid-State Circuits Conference, 12-14 Nov. 2007 2007, pp. 5-9, doi: 10.1109/ASSCC.2007.4425792.

[3]  H. Veldandi and R. A. Shaik, "A 0.3-V Pseudo-Differential Bulk-Input OTA for Low-Frequency Applications," Circuits, Systems, Signal Processing, vol. 37, no. 12, pp. 5199-5221, 2018.

[4]  S. Sadeghi, M. Nayeri, M. Dolatshahi, and A. Moftakharzadeh, "Novel Ultra-Low-Power Mirrored Folded-Cascode Transimpedance Amplifier," Journal of Electrical and Computer Engineering Innovations (JECEI), vol. 11, no. 1, pp. 217-228, 2023, doi: 10.22061/jecei.2022.9015.568.

[5]  H. Faraji Baghtash, "A 0.4 V, tail-less, fully differential trans-conductance amplifier: an all inverter-based structure," Analog Integrated Circuits and Signal Processing, vol. 104, no. 1, pp. 1-15, 2020/07/01 2020, doi: 10.1007/s10470-020-01662-5.

[6]  H. Faraji Baghtash, "A 0.4 ​V, body-driven, fully differential, tail-less OTA based on current push-pull," Microelectronics Journal, vol. 99, p. 104768, 2020/05/01/ 2020, doi: https://doi.org/10.1016/j.mejo.2020.104768.

[7]  K. Monfaredi and H. Faraji Baghtash, "An Extremely Low-Voltage and High-Compliance Current Mirror," Circuits, Systems, and Signal Processing, 2019/06/20 2019, doi: 10.1007/s00034-019-01175-1.

[8]  R. Sanati, F. Khatib, M. Javadian Sarraf, and R. Kardehi Moghaddam, "Low Power Bulk-Driven Time-Domain Comparator with High Voltage-to-Time Gain," Tabriz Journal of Electrical Engineering, vol. 51, no. 4, pp. 393-401, 2022. [Online]. Available: https://tjee.tabrizu.ac.ir/article_14817_9188a938a1095e0ea051ccb71876ce5d.pdf.

[9]  H. Faraji Baghtash, "Mismatch Tolerant, Wide Bandwidth Current Mirror," Tabriz Journal of Electrical Engineering, vol. 48, no. 1, pp. 231-236, 2018. [Online]. Available: https://tjee.tabrizu.ac.ir/article_7461_4aef6a02790b1cf9d2ebbe882a41ce5a.pdf.

[10]         F. Khateb, T. Kulej, H. Veldandi, and W. Jaikla, "Multiple-input bulk-driven quasi-floating-gate MOS transistor for low-voltage low-power integrated circuits," AEU-International Journal of Electronics Communications, vol. 100, pp. 32-38, 2019.

[11]         T. Dubey and V. Bhadauria, "A low-voltage highly linear OTA using bulk-driven floating gate MOSFETs," AEU - International Journal of Electronics and Communications, vol. 98, pp. 29-37, 2019/01/01/ 2019, doi: https://doi.org/10.1016/j.aeue.2018.10.034.

[12]         D. N. Jagadish and M. S. Bhat, "A Low Voltage Inverter Based Differential Amplifier for Low Power Switched Capacitor Applications," in 2014 Fifth International Symposium on Electronic System Design, 15-17 Dec. 2014 2014, pp. 58-62, doi: 10.1109/ISED.2014.20.

[13]         T. Kulej and F. Khateb, "A Compact 0.3-V Class AB Bulk-Driven OTA," IEEE Transactions on Very Large Scale Integration Systems, 2019.

[14]         R. Nagulapalli, K. Hayatleh, and S. Barker, "A Positive Feedback-Based Op-Amp Gain Enhancement Technique for High-Precision Applications," Journal of Circuits, Systems and Computers, vol. 29, no. 14, p. 2050220, 2020, doi: 10.1142/s0218126620502205.

[15]         M. Parvizi, K. Allidina, and M. N. El-Gamal, "Short Channel Output Conductance Enhancement Through Forward Body Biasing to Realize a 0.5 V 250 uW 0.6–4.2 GHz Current-Reuse CMOS LNA," IEEE Journal of Solid-State Circuits, vol. 51, no. 3, pp. 574-586, 2016, doi: 10.1109/JSSC.2015.2504413.

[16]         Y. Li, K. Han, X. Tan, N. Yan, and H. J. E. l. Min, "Transconductance enhancement method for operational transconductance amplifiers," Electronics Letters, vol. 46, no. 19, pp. 1321-1323, 2010.

[17]         X. Zhao, Q. Zhang, Y. Wang, M. J. A.-I. J. o. E. Deng, and Communications, "Transconductance and slew rate improvement technique for current recycling folded cascode amplifier," AEU - International Journal of Electronics and Communications, vol. 70, no. 3, pp. 326-330, 2016.

[18]         J. M. Carrillo, G. Torelli, J. J. A. I. C. Duque-Carrillo, and S. Processing, "Transconductance enhancement in bulk-driven input stages and its applications," Analog Integrated Circuits and Signal Processing, vol. 68, no. 2, pp. 207-217, 2011.

[19]         Q. Zhang, X. Zhao, X. Zhang, Q. J. A.-I. J. o. E. Zhang, and Communications, "Multipath recycling method for transconductance enhancement of folded cascade amplifier," AEU - International Journal of Electronics and Communications, vol. 72, pp. 1-7, 2017.

[20]         M. Akbari, S. Biabanifard, S. Asadi, M. C. J. A.-I. J. o. E. Yagoub, and Communications, "Design and analysis of DC gain and transconductance boosted recycling folded cascode OTA," AEU - International Journal of Electronics and Communications, vol. 68, no. 11, pp. 1047-1052, 2014.

[21]         M. Menon, K. Dhall, A. Gupta, and N. Chaturvedi, "Low power cascaded three stage amplifier with multipath nested miller compensation," in 2010 International Conference on Recent Trends in Information, Telecommunication and Computing, 2010: IEEE, pp. 9-12.

[22]         S. Biabanifard, S. M. Largani, A. Biamanifard, M. Biabanifard, M. Hemmati, and Z. Khanmohammadi, "Three stages CMOS operational amplifier frequency compensation using single Miller capacitor and differential feedback path," Analog Integrated Circuits and Signal Processing, vol. 97, no. 2, pp. 195-205, 2018/11/01 2018, doi: 10.1007/s10470-018-1117-5.

[23]         W.-S. Tam and C.-W. Kok, "Design methodology of double nulling resistors nested-Miller compensation of multistage amplifier," Solid State Electronics Letters, vol. 1, no. 1, pp. 15-24, 2019/01/01/ 2019, doi: https://doi.org/10.1016/j.ssel.2018.06.001.

[24]         T. Kulej and F. Khateb, "Design and implementation of sub 0.5-V OTAs in 0.18-μm CMOS," international Journal of Circuit Theory and Applications, vol. 46, no. 6, pp. 1129-1143, 2018, doi: 10.1002/cta.2465.

[25]         L. H. C. Ferreira and S. R. Sonkusale, "A 60-dB Gain OTA Operating at 0.25-V Power Supply in 130-nm Digital CMOS Process," IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 6, pp. 1609-1617, 2014, doi: 10.1109/TCSI.2013.2289413.

[26]         X. Zhao, H. Fang, T. Ling, and J. J. I. Xu, "Transconductance improvement method for low-voltage bulk-driven input stage," Integration The VLSI Journal, vol. 49, pp. 98-103, 2015.

[27]         M. Trakimas and S. Sonkusale, "A 0.5 V bulk-input OTA with improved common-mode feedback for low-frequency filtering applications," Analog Integrated Circuits and Signal Processing, journal article vol. 59, no. 1, pp. 83-89, April 01 2009, doi: 10.1007/s10470-008-9236-z.

[28]         N. Suda, P. V. Nishanth, D. Basak, D. Sharma, and R. P. Paily, "A 0.5-V low power analog front-end for heart-rate detector," Analog Integrated Circuits and Signal Processing, journal article vol. 81, no. 2, pp. 417-430, November 01 2014, doi: 10.1007/s10470-014-0402-1.

[29]         M. Akbari and O. Hashemipour, "A 0.6-V, 0.4-µW bulk-driven operational amplifier with rail-to-rail input/output swing," Analog Integrated Circuits Signal Processing, vol. 86, no. 2, pp. 341-351, 2016.

[30]         A. D. Grasso, S. Pennisi, G. Scotti, and A. Trifiletti, "0.9-V Class-AB Miller OTA in 0.35-μm  CMOS With Threshold-Lowered Non-Tailed Differential Pair," IEEE Transactions on Circuits Systems I: Regular Papers, vol. 64, no. 7, pp. 1740-1747, 2017.