بهبود سرعت مقایسه‌کننده دینامیکی تک-فاز

[1]      S. Sheikhaei, S. Mirabbasi and A. Ivanov, “A 43-mW single-channel 4-GS/s 4-bit flash ADC in 0.18 μm CMOS,” in Proc. IEEE International Custom Integr. Circuits Conf. (CICC), PP. 333-336, 2007.

[2]      S. Park, Y. Palaskas, A. Ravi, R.E. Bishop and M.P. Flynn, “A 3.5-GS/s 43-mW single-channel 5-b flash ADC in 90-nm CMOS,” IEEE International Custom Integrated Circuits Conf. (CICC), PP. 489-492, 2006.

[3]      M. Choi and A. A. Abidi, “A 6-b 1.3-Gsample/s A/D converter in 0.35-μm CMOS,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1847-1858, Dec. 2001.

[4]      K. Deguchi, N. Suwa, M. Ito, T. Kumamoto and T. Miki, “A 6-bit 3.5-GS/s 0.9-V 98-mW flash ADC in 90-nm CMOS,” IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2303-2310, Oct. 2008.

[5]      B. Wicht, T. Nirschl and D. S. Landsiedel, “Yeild and speed optimization of a latch-type voltage sense amplifier,” IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1148-1158, Jul. 2004.

[6]      H. Y. Chang, and C. Y. Yang, “A reference voltage interpolation-based calibration method for flash ADC,” IEEE Trans. Very Large Scale Integration Systems, vol. 24, no. 5, pp. 1-11, Jan. 2016.

[7]      J. I. Kim, D. R. Oh, D. S. Jo, B. R. Saim and S. T. Ryu, “A 65-nm CMOS 6-b 2-GS/s 20.7mW flash ADC with cascaded latch interpolation,” IEEE J. Solid-State Circuits, vol. 50, no. 10, pp. 1-12, Oct. 2015.

[8]      A. Varzaghani, A. Kasapi, D. N. Loizos, S. H. Paik, S. Verma, S. Zogopoulos and S. Sidiropoulos, “A 10.3-GS/s 6-bit flash ADC for 10G Ethernet apllications,” IEEE J. Solid-State Circuits, vol. 48, no. 12, pp. 1-11, Dec. 2013.

[9]      M. Chahardori, M. Sharifkhani and S. Sadughi, “A 4-bit, 1.6-GS/s low-power flash ADC, based on offset calibration and segmentation,” IEEE Trans. Circuits and Systems-I, Regular Papers, vol. 60, no. 9, pp. 2285-2297, Sep. 2013.

[10]      J. Yao, J. Liu and H. Lee, “Bulk voltage trimming offset calibration for high-speed flash ADCs,” IEEE Trans. Circuits and Systems-II, Exp. Beiefs, vol. 57, no. 2, pp. 110-114, Feb. 2010.

[11]      P. Nuzzo, G. Van der Plas, F. De Bernardinis, L. van der Perre, B. Gyselinckx and P Terreni, “A 10.6-mW/0.8-pJ power-scale 1GS/s 4b ADC in 0.18μm CMOS with 5.8GHz ERBW,” in Proc. IEEE Int. Design Automation Conf. (DAC), pp. 873-878, 2006.

[12]      A A. Ismail, M. Elmasry, “A 6-bit 1.6-GS/s low-power wideband flash ADC converter in 0.13μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 43, no. 9, pp. 1982-1990, Sep. 2007.

[13]      X. Yang and J. Liu, “A 10-GS/s 6-b time-interleaved partially active flash ADC,” IEEE Tran. Circuits and Systems-I, vol. 61, no. 8, pp. 2272-2280, Aug. 2014.

[14]      B. W. Chen, S. K. Hsien, C. S. Chiang and K. C. Juang, “A 6-bit 1.2 GS/s ADC with wideband THA in 0.13-μm CMOS,” IEEE Asian Solid-State Circuits Conference, pp. 381-384, Japan, Nov. 2008.

[15]      C. Sandner, M. Clara, A. Santner, T. Hartig and F. Kuttner, “A 6-bit 1.2-GS/s low-power flash ADC in 0.13-μm digital CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 7, pp. 1499-1505, Jul. 2005.

[16]      Y. Nakajima, N. Kato, A. Sakaguchi, T. Ohkido and T. Miki, “A 7-bit, 1.4 GS/s ADC with offset drift suppression techniques for one-time calibration,” IEEE Trans. Circuits and Systems-I, Regular Papers, vol. 60, no. 8, pp. 1979-1990, Aug. 2013.

[17]      C.-Y. Chen, M. Q. Le and K. Y. Kim, “A low power 6-b flash ADC with reference voltage and common-mode calibration,” IEEE J. Solid-State Circuits, vol. 44, no. 4, pp. 1041-1046, Apr. 2009.

[18]      T. Ito and T. Itakura, “A 3-GS/s 5-bit 36-mW flash ADC in 65-nm CMOS,” IEEE Asian Solid-State Circuits Conference, pp. 181-184, China, 2010.

[19]      J. Pernillo and M. P. Flynn, “A 1.5-GS/s flash ADC with 57.7-dB SFDR 6.4-Bit ENOB in 90-nm digital CMOS,” IEEE Trans. Circuits and Systems-II, Exp. Beiefs, vol. 58, no. 12, pp. 837-841, Dec. 2011.

[20]      مهدی حسین‌نژاد، حسین شمسی، «طراحی و شبیه‌سازی مبدل آنالوگ به دیجیتال لوله‌ای مبتنی بر مقایسه‌گر ولتاژ پایین»، مجله مهندسی برق دانشگاه تبریز، دوره 46، شماره 1، صفحات 209-219، تابستان 1395.

[21]      خلیل منفردی، یوسف بلقیس‌آذر، «تقویت‌کننده کسکود تمام تفاضلی بازیابی تاشده بهبودیافته ولتاژ و توان پایین»، مجله مهندسی برق دانشگاه تبریز، دوره 48، شماره 1، صفحات 327-334، بهار 1397.

[22]      Seyed Javad Azhari, Khalil Monfaredi and Salar Amiri, “A 12-bit, low-voltage, nanoampere-based, ultralow-power, ultralow-glitch current-steering DAC for HDTV,” International Nano Letters, vol. 2, no. 1, pp. 2-7, Nov. 2012.

[23]      David Johns and Ken Martin, Analog Integrated Circuit Design, John Wiley & Sons press, 1997.