یک قدم رو‌به‌جلو در طراحی مدارات مقیاس نانو به‌و‌سیله هوش ماشین

[1]      C. S. Lent, P. D. Tougaw, W. Porod and G. H. Bernstein, “Quantum cellular automata,” Nanotechnology, vol. 4, pp. 49–57, 1993.

[2]      C. S. Lent and P. D. Tougaw, “A device architecture for computing with quantum dots,” Proc. IEEE, vol. 85, no. 4, pp. 541-557, April 1997.

[3]      W. Liu, S. Srivastava, L. Lu, M. O'Neill and E. E. Swartzlander, “Are QCA cryptographic circuits resistant to power analysis attack?,” IEEE Transactions on Nanotechnology, vol. 11, no. 6, pp. 1239-1251, November 2012.

[4]      P. Singh and R. Chandel, “Design and performance analysis of digital circuits using carbon nanotube transistors,” In Inventive Communication and Computational Technologies (ICICCT), 2017 International Conference on, pp. 166-171. IEEE, 2017.

[5]      A. Karimi and A. Rezai, “Improved device performance in CNTFET using genetic algorithm,” ECS Journal of Solid State Science and Technology, 6(1), pp.M9-M12, 2017.

[6]      A. Karimi and A. Rezai, “A design methodology to optimize the device performance in CNTFET,” ECS Journal of Solid State Science and Technology, 6(8), pp.M97-M102, 2017.

[7]      حامد نجفعلی زاده و علی اصغر اروجی، «طراحی ساختاری از ترانزیستور ماسفت دو گیتی با به کارگیری دو ماده اکسید هافنیم (HfO₂) و سیلیسیم-ژرمانیوم (SiGe) در کانالی از جنس سیلیسیم (DM-DG)»، مجله مهندسی برق دانشگاه تبریز، جلد 47، شماره 1، صفحات 299-304، 1396. 

[8]      مهسا مهراد و میثم زارعی، «ارائه ساختاری جدید از ترانزیستورهای اثر میدان در مقیاس نانو به منظور بالا بردن قابلیت اطمینان»، مجله مهندسی برق دانشگاه تبریز، جلد 48، شماره 3، پاییز 1397.  

[9]      W. Liu, L. Lu, M. O’Neill and E. E. Swartzlander, “A first step toward cost functions for quantum-dot cellular automata designs,” IEEE Transactions on Nanotechnology, vol. 13, no. 3, pp.476-487, May 2014.

[10]      R. Zhang, K. Walus, W. Wang and G. A. Jullien, “A method of majority logic reduction for quantum cellular automata,” IEEE Transactions on Nanotechnology, vol. 3, no. 4, pp. 443-450, December 2004.

[11]      Z. Huo, Q. Zhang, S. Haruehanroengra and W. Wang, “Logic optimization for majority gate-based nanoelectronic circuits,” Proceedings of the IEEE International Symposium on Circuits and Systems, pp. 1307–1310, 2006.

[12]      P. Wang, M. Y. Niamat, S. R. Vemuru, M. Alam and T. Killian, “Synthesis of majority/minority logic networks,” IEEE Transactions on Nanotechnology, vol. 14, no. 3, pp.473-483, 2015.  

[13]      M. R. Bonyadi, S. M. R. Azghadi, N. M. Rad, K. Navi and E. Afjei, “Logic optimization for majority gate-based nanoelectronic circuits based on genetic algorithm,” Proceedings of the IEEE International Conference on Electrical Engineering, pp. 1-5, April 2007.

[14]      M. Houshmand, S. H. Khayat and R. Rezaei, “Genetic algorithm based logic optimization for multi-output majority gate-based nano-electronic circuits,” Proceedings of the IEEE International Conference on Intelligent Computing and Intelligent Systems, pp. 584–588, November 2009.

[15]      R. Rezaee, M. Houshmand and M. Houshmand, “Multi-objective optimization of QCA circuits with multiple outputs using genetic programming,” Genet Program Evolvable Mach, pp. 95-118, 2013.

[16]      Z. Beiki, M. Soryani and S. Mirzakuchaki, “Cell number optimization for quantum cellular automata based on genetic algorithm", Proceedings of the 3^rd International Conference on Electronic Computer Technology, pp. 370–373, April 2011.

[17]      M. A. Tehrani, K. Navi and A. Kia-kojoori, “Multi-output majority gate-based design optimization by using evolutionary algorithm,” Swarm and Evolutionary Computation, vol. 10, pp. 25-30, 2013.

[18]      M. H. Mahalat, M. Goswami, A. Mondal and B. Sen, “Synthesis and optimization of multi-objective multi-output QCA circuit using genetic algorithm,” arXiv preprint arXiv: 1705.04099, 2017.

[19]      G. Khademi, S. Soltani Fahraj, M. T. Moradgholi and M. Houshmand, “Logic optimization of QCA circuits using Ant colony optimization,” Proceedings of the 22^rd Iranian Conference on Electrical Engineering, May 2014.

[20]      A. O. Orlov, I. Amlani, G. H. Bernstein, C. S. Lent and G. L. Snider, “Realization of a functional cell for quantum dot cellular automata,” Science, vol. 277, pp. 928-930, August 1997.

[21]      I. E. Arani and A. Rezai, “Novel circuit design of serial–parallel multiplier in quantum-dot cellular automata technology,” Journal of Computational Electronics, vol. 17, no. 4, pp.1771-1779, 2018.

[22]      P. D. Tougaw and C. S. Lent, “Logical devices implemented using quantum cellular automata,” Journal of Applied Physics, vol. 75, no. 3, pp. 1818–1825, 1994.

[23]      H. Rashidi, A. Rezai and S. Soltany, “High-performance multiplexer architecture for quantum-dot cellular automata,” Journal of Computational Electronics, vol. 15, no. 3, pp.968-981, 2016.

[24]      H. Cho and E. E. Swartzlander, “Adder and multiplier design in quantum-dot cellular automata,” IEEE Trans. Computers, vol. 58, No. 6, pp. 721–727, June 2009.

[25]      C. S. Lent, M. Liu and Y. Lu, “Bennett clocking of quantum-dot cellular automata and the limits to binary logic scaling,” Nanotechnology, vol. 17, pp. 4240-4251, 2006.

[26]      J. F. Miller, “An empirical study of the efficiency of learning Boolean functions using a Cartesian genetic programming approach,” Proc. Genetic and Evolutionary Computation Conference, pp. 1135–1142, 1999.

[27]      J. F. Miller and P. Thomson, “Cartesian genetic programming,” Proc. European Conference on Genetic Programming, vol. 1802, pp. 121–132, 2000.

[28]      J. F. Miller, Cartesian Genetic Programming, Springer, Berlin Heidelberg, 2011.

[29]      I. Rechenberg, Evolutionsstrategie-Optimierung technischer Systeme nach Prinzipien der Biologischen Evolution, Ph.D. Dissertation, Technical University of Berlin, Germany, 1971.