ارائه یک حلقه قفل‌شونده در فاز بسیار سریع با استفاده از یک آشکارساز فاز حلقه-‌باز وترانزیستورهای مبتنی بر نانولوله کربنی

[1]      علی اصغر اروجی، زینب رمضانی و عاطفه رحیمی فر،«ترانزیستور اثر میدان فلز-نیمه هادی در تکنولوژی سیلیسیم روی عایق با استفاده از یک تکه اکسید اضافی در کانال برای کاربردهای توان و فرکانس بالا»، مجله مهندسی برق دانشگاه تبریز، جلد ۴۶ ، شماره ۴، صفحه 1-6 ، 1395 .

[2]      مهسا مهراد و میثم زارعی، « ارائه ساختار نوین ترانزیستور اثر میدان سیلیسیم روی عایق دو‌گیتی با پنجره اکسید در درین گسترده‌شده به‌منظور کاربرد در تکنولوژی نانو» ، مجله مهندسی برق دانشگاه تبریز، جلد ۴7 ، شماره 2،صفحه 727-733 ، 1396 .

[3]      R. Martel, T. Schmidt, H.R. Shea, T. Hertel and P. Avouris, “Single and Multi-wall Carbon Nanotube Field-Effect Transistors”, Applied Physics Letters, vol. 73, no. 1, pp. 2447-2449 1998.

[4]     J. Deng, Device Modeling and Circuit Performance Evaluation for Nanoscale Devices: Silicon Technology Beyond 45 Nm Node and Carbon Nanotube Field Effect Transistors. Stanford University, Serra Mall, Stanford, United States, pp. 1-9, 138-142 and 152, June, 2007.

[5]      M. Shafizadeh and A. Rezai,” Improved device performance in a CNTFET using La2O3 high-κ dielectrics”, Journal of Computational Electronics, 2017.

[6]      A. Karimiz and A. Rezai,” A Design Methodology to Optimize the Device Performance in CNTFET”, ECS Journal of Solid State Science and Technology, July 11, 2017.

[7]      F. Calmon, C. Andrei, O. Valorge, J.C.N. Perez, J. Verdier, and C. Gontrand, “Impact of Low-Frequency Substrate Disturbances on a 4.5GHz VCO”, Microelectronics journal, vol. 37, no. 10, pp. 1119–1127, 2006.

[8]      H.C. Chiu, C.S. Cheng, Y.T. Yang and C.C. Wei, “A 10 GHz Low Phase-Noise CMOS Voltage-Controlled Oscillator Using Dual-Transformer Technology”, Solid-State Electronics. vol. 52, no. 5, pp. 765–770, 2008.

[9]      Y.A. Eken and P. John, “A 5.9 GHz Voltage-Controlled Ring Oscillator in 0.18-um CMOS”, IEEE J. Solid-state Circuits vol. 39, no. 1, pp. 230–233, 2004.

[10]      K.H. Cheng, Y.C. Tsai, Y. L. Lo and J.S. Huang, “A 0.5-V 0.4–2.24-GHz Inductorless Phase-Locked Loop in a System-on-Chip”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 58, no. 5, pp. 849–859, 2011.

[11]      K. H. Tsai and S. I. Liu, “A 104-GHz Phase-Locked Loop Using a VCO at Second Pole Frequency”, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 20, no. 1, pp. 80-88, 2012.

[12]      W.S.T. Yan and H.C. Luong, “A 900-MHz CMOS Low-Phase-Noise Voltage- Controlled Ring Oscillator”, IEEE Transactions on circuits and systems II: analog and digital signal processing, vol. 48, no. 2, pp. 216–221, 2001.

[13]      L. Dai and R. Harjani, “Design of Low-Phase-Noise CMOS Ring-Oscillators”, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, vol. 49, no. 5. pp. 328–338, 2002.

[14]      W. Fei, H. Yu, H. Fu, J. Ren and K.S. Yeo, “Design and Analysis of Wide Frequency Tunning Range CMOS 60 GHz VCO by Switching Inductor Loaded Transformer”, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 61, no. 3, pp. 699-710, 2014.

[15]      R.Y. Chen and W.Y. Chen, "A High-Speed Fast-Acquisition CMOS Phase/Frequency Detector for MB-OFDM UWB" IEEE Transactions on Consumer Electronics, vol. 53, no.1, pp.23, 26, 2007.

[16]      M. Soyuer and R.G. Meyer, “Frequency Limitations of a Conventional Phase-Frequency Detector” IEEE Journal of solid-state circuits, vol. 25, no. 4, pp. 1019-1022, 1990.

[17]      H. R Erfani-Jazi and N. Ghaderi, “A Divider-less, High Speed and Wide Locking Range Phase Locked Loop” AEU-International Journal of Electronics and Communications, vol. 69, no. 4, pp. 722-729, 2015.

[18]      M.K. Hati and T.K. Bhattacharyya, "A High o/p Resistance, Wide Swing and Perfect Current Matching Charge Pump Having Switching Circuit for PLL", Microelectronics Journal, vol. 44, no. 8, pp. 649-657, Aug. 2013.

[19]      P. Liu, P.Sun, J. Jumg and D. Heo,” PLL Charge Pump with Adaptive Body-Bias Compensation for Minimum Current Variatio”, Electronics Letters, vol.4, No.1, pp.16-18,2012.

[20]      F. Yuan, CMOS Active Inductors and Transformers Principle, Implementation, and Applications, Department of Electrical and Computer Engineering, Ryerson University, Toronto, Ontario, Canada. pp. 17-21, 29-55, 199-202 and 231-253, Dec. 2007.

[21]      F. Yuan, “A Fully Differential VCO Cell with Active Inductors for Gbps Serial Links”, Analog Integrated Circuits and Signal Processing, vol. 47, no. 2, pp. 213–223, 2005.

[22]      A. Thanachayanont, “CMOS Transistor-Only Active Inductor for If/Rf Applications”. IEEE International Conference on Industrial Technology, ICIT'02. vol.2, no.1, pp. 1209–1212, 2002.

[23]      A. Amani Beni and N. Ghaderi, “A High Speed Voltage Controlled Oscillator with Carbon Nanotube Field Effect Trransistors”, 3rd National & 1st International Conf. Applied Research in Electrical, Mechanical & Mechatronic, Malek e Ashtar university, Tehran, 2016. (in Persian)

[24]      J. Yang, C.Y. Kim, D.W. Kim and S. Hong, “Design of a 24-GHz CMOS VCO With an Asymmetric-Width Transformer”, IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 57, No. 3, pp. 173-177, 2010.

[25]      H. Ramiah, C.W. Keat and J. Kanesan, Design of Low- Phase Noise, Low Power Ring Oscillator for OC-48 Application, IETE Journal of Research. vol. 58, no. 5, pp. 425-428, 2012.

[26]      K.H. Cheng, T.H. Yao, S.Y. Jiang and W.B. Yang, “A Difference Detector PFD for Low Jitter PLL”, In Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on. vol. 1, pp. 43-46, 2001.

[27]      Y. Sun, L. Siek and P. Song, "Design of a High Performance Charge Pump Circuit for Low Voltage Phase-locked Loops", In Integrated Circuits, 2007. ISIC'07. International Symposium on, pp. 271,274, Sept. 2007.

[28]      F. Ge, “PFD-CP Phase Locked Loop Design”, PLL Design, 2001.

[29]      W.H. Chiu, Y.H. Huang, and T.H. Lin, “A Dynamic Phase Error Compensation Technique for Fast-Locking Phase- Locked Loops”, IEEE Journal of Solid-State Circuits, vol. 45, no. 6, pp. 1137-1149, 2010.

[30]      P.K. Tsai and T.H. Huang, “Integration of Current-Reused VCO and Frequency Tripler for 24-GHz Low-Power Phase-Locked Loop Applications”, IEEE Transactions on Circuits and Systems II: Express Brief, vol. 59, no. 4, pp. 199-203, 2012.

[31]      I.T. Lee, Y.T. Tsai and S.I. Liu, “A Fast-Locking Phase-Locked Loop Using CP Control and Gated VCO, VLSI Design”, In VLSI Design, Automation, and Test (VLSI-DAT), 2012 International Symposium on, pp. 1-4, 2012.

[32]      J. Deng and H.-S. Wong, “A compact SPICE model for carbon-nanotube field-effect transistors including nonidealities and its application-Part II: Full device model and circuit performance benchmarking” IEEE Trans. Electron Devices, vol. 54, pp. 3195-3205, 2007.